Digital receiver for spread-spectrum signals

ABSTRACT

The receiver contains a correlator (TIC) for the correlation of the received signal with a reference code (R(k)) and a digital signal processor for evaluating the results of the correlation. The correlator is constructed as digital, time-integrating, multistage correlator (TIC), the individual stages (Kl to KN) of which are connected on the one hand to a digital delay line (17) fed with the reference code (R(k)) and to which on the other hand a digital signal (S(k)) recovered from the received signal is applied, to length (D) of the delay line (17) being adapted to the maximum expected impulse response to the transmission channel.

The present invention relates to a digital receiver for spread-systemsignals generated by multiplication of an information-carrying signal byan auxiliary function, having a correlator for the correlation of thereceived signal with a reference code, and having a digital signalprocessor for evaluating the results of the correlation.

European Patent Application No. 89,117,388.2 describes a digital radiotransmission system which uses the spread-spectrum technique in whichdigital signal processing is used bu the correlators of the receives areconstructed discretely with analog components and are thus relativelycostly in terms of space and power requirements. In addition, the analogcomponents have the known drifting and aging problems and they alsorestrict the application possibilities of the digital signal processing.

By means of the invention, the implementation of digital correlatorswith sufficiently high time-bandwidth products will now be madepossible, so that receives can be built which are compact and economicalin terms of power consumption and which do not have any drifting andaging problems.

This object is achieved according to the invention by means of adigital, time-integrating, multistage correlator, the individual stagesof which are connected on the one hand to a digital delay line fed withthe reference code and to which on the other hand a digital signalrecovered from the received signal is applied, the length of the delayline being adapted to the maximum expected length of the impulseresponse of the transmission channel.

The correlator according to the invention can be integratedmonolithically and is therefore economical in terms of space and powerand is easy to install. The receives equipped with correlators of thiskind do not have the drifting and aging problems of the known analogsolutions and are extremely flexible. The receives are particularlysuitable for radio transmission systems with multipath propagation, butthey also permit multiple use of the transmission channel by means ofmultiple access (code division multiple access=CDMA). Such receivers areused advantageously for radio systems with microcell arrangement inlocally limited areas such as factory premises, houses or multistorybuildings.

The invention is explained in greater detail below with reference to anexemplary embodiment and the drawings, in which:

FIG. 1 shows a block circuit diagram of a digital multipath receiver forspread-spectrum signals,

FIG. 2 shows a block circuit diagram of the correlator of the receiverof FIG. 1; and

FIGS. 3a, 3b, 4a, 4b are diagrams for the purpose of functionalexplanation.

The multipath receiver according to the invention is a digital receiverfor spread-spectrum signals according to the so-called direct sequencemethod and it is particularly suitable for radio transmission systems onchannels with multipath propagation. A system of this kind is describedin European Patent Application No. 89,117,388.2 by the Ascom Zelcom AG,reference being hereby explicitly made to the disclosure of said patentapplication. The digital receiver described below constitutes animprovement of the correlation receiver described in this patentapplication, the improvement concerning primarily the employedcorrelators of the receiver, in that now digital correlators areproposed.

FIG. 1 shows a block diagram of a digital multipath receiver whichincludes, according to the illustration, three blocks: a converter 1, aso-called I/Q processor 2 and of a digital stage 3. In the converter 1,the received broad-band signal which arrives at the aerial of thereceiver via paths Pl to Px is filtered in a band-pass filter 4 in orderto suppress signals outside the employed frequency band. The outputsignal of the band-pass filter 4 is amplified in an amplifier 5 andmixed in a mixer 6, at whose other input a local oscillator 7 isconnected, to an intermediate frequency f_(IF). This intermediatefrequency signal now passes into the I/Q processor 2 where it isfiltered in a further band-pass filter 8 and then mixed into the baseband by multiplication mixer 9, 9') by a cosine or sine signal of thefrequency fo from a local oscillator 10. As a result, two resultingsignals I(t) and Q(t) arise which are freed from high-frequency signalportions by low-pass filters 11, 11' and amplified in amplifiers 12,12'. Subsequently, the two signals are quantized in analog-to-digitalconverters 13, 13' with a sampling rate of fs=c/Tc and represented asdigital values I(k) and Q(k) by b bits, b being for example equal to 8.

In the formula for the sampling rate fs, c designates the number ofsampling values per code element (=chip) and Tc the duration of a chip.This duration corresponds to the smallest square-wave pulse length ofthe auxiliary function used for band spreading, the characteristic ofwhich of course is known to the receiver in a spread-spectrum system andwhich is formed in the receiver by the reference code.

The third block of the receiver, the digital stage 3 which processesexclusively digital signals, essentially includes correlators TIC, areference code generator 14 and a digital signal processor 15. Thesequences I(k) and Q(k) are each fed into a correlator TIC andcorrelated there with the reference code R(k). The correlation resultsCI(m) and CQ(m) are read by the digital signal processor 15 andprocessed further. The latter derives control signals PD from them forcontrolling the reference code generator 14 and the correlators TIC,calculates the deviation between he carrier frequency f_(IF) and thelocal oscillator frequency fo and carries out the coherent demodulationof the transferred information bits. The reference code generator 14supplies the correlators TIC with the reference code R(k), the samplingrate fs and a synchronization signal SY, and supplies theanalog-to-digital converters 13, 13' with the sampling rate fs.

The requirements on digital correlators are determined by the parametersof the in-house radio transmission system. A clock rate (chip rate) forthe pseudo-random auxiliary function in the region of 10 to 30 MHz canbe derived from the coherence bandwidth of the propagation channel. Inorder to permit a sufficiently large number of users in a cellularsystem with multiple access (CDMA) spreading factors of at least 255 toapproximately 4000 are required. Since the synchronization of the localreference code to the received code should also occur digitally in adigital correlation receiver and in this process each chip must besampled at least twice, sampling and processing rates for the correlatorof 20 to 60 MHz are obtained.

Since a plurality of signals are superimposed on one another at thereception site due to multipath propagation and multiple occupation ofthe channel by means of CDMA, at the receiver input the signal no longerhas a constant signal envelope and must therefore be amplitude-quantizedin front of the correlator with resolution of several bits. If this doesnot occur, intolerable losses then arise. The reference code can,however, be present as a binary signal.

A digital correlator which fulfils these requirements can be realized asa programmable transverse filter or as a time-integrating correlator. Animplementation as programmable transverse filter is known from thepublication "Digital SOS-MOS Correlator: Basic System Component inExperimental Army Spread Spectrum Radio" by N. A. Saethermoen, B. Skeieand S. Prytz in 2nd Int. Conf. on the Impact of High Speed and VLSITechnology on Comm. Systems, London 1983. However, this implementationis extremely costly since with two sampling values per code chip persignal bit, at least 2:L memory cells for each of the reference codesand the signal are required and 2:L multipliers are required (L=codelength). The data rate of the correlation result is the same as thesampling rate of the input signal and therefore very high. This permitsa rapid synchronization but is unfavourable for the further digitalsignal processing.

In contrast to the programmable transversal filter, the output data ratein a time-integrating correlator is reduced in relation to the samplingrate at the input by the number of summed correlation products. Withintegration over a complete code period, the correlation results onlyoccur with the information bit rate, which signifies a reduction in thesampling rate of the input signal by the product c:L (c=number ofsampling values per code chip). This reduced data rate can now be easilyprocessed further in a digital signal processor.

From the literature, implementations of time-integrating correlators inCCD technology (CCD: charge-coupled device) are known (B. E. Burke, D.L. Smythe: "A CCD Time-Integrating Correlator", IEEE J. of Solid StateCircuits, SC-18, Dec. 1983) and as acousto-optical components (F. B.Rotz: "Time-Integrating Optical Correlator", Proc SPIE, Vol. 202, 1979).Since, one the one hand, the CCD solution is limited to clock rates of amaximum of 20 MHz and has a dynamic range restricted by offset voltagesand clock crosstalk, and, on the other hand, the acousto-opticalsolution cannot be built up monolithically and is moreover complicatedand expensive, these known implementations are not suitable for thedigital multipath receiver of FIG. 1.

Although the digital correlator TIC is a time-integrating correlator, itis neither a charge-coupled nor an acousto-optical component, but ratherits architecture is especially adapted to the requirements of amultipath receiver according to the scanner principle. The solutionfound for this, which is described below, is monolithicallyintegrateable and therefore simple to use, and it is space-saving andeconomical in terms of power. The programmable functions of thetime-integrating correlator TIC and the evaluation of the correlationresults in the digital signal processor 15 permit the construction of avery flexible spread-spectrum receiver.

FIG. 2 shows a block diagram of the time-integrating correlators TICemployed in the receiver of FIG. 1. The number sequences, designated inFIG. 1 by I(k) and Q(k), of the I/Q processor 2 are designated here ingeneral as representative of both number sequences with S(k). Accordingto the illustration, the correlator includes N correlator stages Kn, acontrol logic 16 and a digital delay line 17, to which the correlatorstages are connected in parallel.

The architecture of the time-integrating correlator is adapted to theexpected impulse response of the propagation channel. This impulseresponse is, as measurements have shown, significantly shorter than thedata bit length, so that significant correlation values only ariseduring a short part of the code length. In the synchronized state, it istherefore sufficient to correlate only a small section of the completecode with the received signal. For this purpose, the binary referencecode R(k) supplied by the reference code generator 14 (FIG. 1) is fedinto the digital delay line 17, which has a certain length D, in thepresent case D=32, and which is operated with the clock fs, for examplefs=2/Tc. The reference code is delayed by the time Td between each ofthe terminals of two successive correlator stages Kn, in which casepreferably Td=Tc/2. The n-th correlator stage therefore receives thereference code delayed by n:Td as a reference signal. The digitizedoutput signal S(k) of the I/Q processor 2 (FIG. 1) having, for example,8-bit resolution is connected in parallel to all correlator stages Kn.

Each correlator stage Kn contains, as illustrated, an accumulator 18 anda result memory 19 which are both controlled by the control logic 16,and calculates the product of S(k) and R(k-n). These products are summedand stored in the respective accumulator 18 over a complete code lengthk (k=1 . . . c times L). At the end of the summation, the correlationvalue Cn(m) is transmitted into the result memory 19 by a control signalRS' of the control logic 16, and then the accumulator 18 is set to zeroagain with RS. Each result memory 19 supplies its correlation valueCn(m) after a corresponding control signal REn (m=1 to N) of the controllogic 16 to the digital signal processor 15 (FIG. 1) which furtherprocesses the results of the preceding correlation during the nextsummation period. On the basis of the signal REn (Read Enable) and underthe control of the digital signal processor in each case a singlecorrelation is read out via a bus.

The design of the time-integrating correlator TIC can be furthersimplified by means of a selection circuit 20 which connects a delayedreference sequence for each correlation stage Kn with a delay which canbe programmed by the digital signal processor 15. This simplification isbased on the following consideration: the length D of the delay line 17must be adapted to the maximum expected length of the channel impulseresponse which is approximately 1 microsecond in the present case.However, in practice this impulse response always consists of aplurality of discrete signal portions with specific delays tp, so thatonly these discrete signal portions, therefore, need to be correlated.For this purpose, correlator stages are placed only at those points tpwhere signal portions are effectively present. As a result, the number Nof correlator stages can be kept substantially smaller than the length Dof the delay line 17. In the present exemplary embodiment where D=32, anumber of N=8 correlator stages is still sufficient. A precondition forthis mode of operation is a free programmability of the delay of eachcorrelator stage. The programming occurs through the digital signalprocessor 15 which drives a line DL via control logic 16, that programsthe selection circuit 20 which, itself, connects the reference sequencewith the programmed delay to the respective correlator stage.

In addition to the already mentioned advantages of the digital multipathreceiver, a further essential advantage includes the fact that theessential functions of a spread-spectrum receiver can be completelycarried out by corresponding operations in the digital signal processor.The receiver can be characterized by the following states:

-coarse synchronization (acquisition)

-operation

-re-synchronization on loss of the code synchronism.

As already mentioned, the duration of the impulse response of thetransmission channel is only a fraction of the data bit length and thusof the code length L. For the acquisition, the N correlator stages ofthe time-integrating correlator are now programmed in such a way thatthe delay positions between succeeding stages differ by a constant delaye:Tc, e=1 being selected for example. By shifting the receive-sidereference code by N:e:Tc after every accumulation period, the completecode length is correlated sequentially with the received signal. Theacquisition time Tacq is then Tacq=L:Tc:(L/N:e)) in comparison to L:TcL/e for a correlator of the type of a programmable transverse filter.The respective reception energy E(m) for each delay can be calculatedform the correlation values CI(m), CQ(m) obtained in this way:

    E(m)=CI(m).sup.2 +CQ(m).sup.2

After searching the complete code length, the position is determinedwhere the maximum reception energy has occurred. In order to confirmwhether the energy maximum has really been found, it is examined whetherthe energy around this maximum is greater by a specific amount than thenoise energy averaged over the complete code length. If this is thecase, the reference code generator 14 (FIG. 1) is programmed in such away that the energy maximum lies in the center of the reception windowcovered by the correlator. Thus, the acquisition is terminated and thereceiver goes into the normal operating state; otherwise the acquisitionis repeated.

The normal operating state comprises the following functions: monitoringthe channel impulse response (scanning); tracking the phase of the localreference code generator; estimating the carrier phase and coherent ordifferential demodulation of the signals of the individual receptionpaths; deriving the weighting functions for the individual receptionpaths from the channel impulse response; combining the individual pathsand detecting the transferred data bit. If an error protection codinghas occurred in the transmitter, the receiver can additionally supply aquality criterion for the following error decoder for the so-called softdecision.

The advantages of a multipath receiver then have the maximum effect if agood estimation of the channel impulse response can be carrier out. Thisoccurs in the present digital receiver by means of the scanningalgorithm, for which S of the total N correlator stages of thetime-integrating correlator TIC can be used. The other correlator stages(number=N-S) are required in parallel to the latter for the datademodulation. With the scanner-correlation stages mutually shifted bythe Td, L:Tc correlation values are calculated during a code period.Then, the correlator stages are shifted by S:Td, and the calculation ofthe correlation values is repeated for this position. After ts=D/S codeperiods, the entire window is searched and the scanning process beginsagain. This scanning function is illustrated in FIG. 3a.

As can be seen in FIG. 3b, the correlator stages required for thedemodulation are programmed at the points where the greatest receptionpower is to be expected. These correlation values CI(m) and CQ(m) can beinterpreted according to FIG. 4a as coordinates of a data vectord(m)=(CI(m), CQ(m)) in the complex plane. FIG. 4a therefore constitutesthe absolute value of the channel impulse response measured during thescanning function.

In order for the measurements of the channel impulse response to besignificant when scanning, the scan time ts must be smaller than theminimum change time of the transmission channel. The more correlatorstages which are used for the scanning, the quicker the changingchannels which can be monitored. Hence, correspondingly fewer correlatorstages are then available for the data demodulation. For typicalin-house channels in the described system for example S=4 scannerchannels are required. Since the time-integrating correlator TIC can beprogrammed by the digital signal processor 15 (FIG. 1), the partitioninto scanner and demodulator channels can also occur adaptively.

With the aid of the correlation values of the scanner channels, it ismonitored whether the correlation window of the time-integratingcorrelator TIC is correctly positioned in relation to the receivedsignal. Because the channel impulse response is usually shorter than thewindow width, a noise power can be determined from the values outsidethe impulse response. If the ratio of the power of all the receptionpaths to this noise power falls below a predetermined threshold, aresynchronization is initiated.

The fine synchronization (tracking) of the reference code can occur insuch a way that the weighted average of the D correlation values, thatis to say their median point, is positioned in the center of the windowof the time-integrating correlator. A different method consists inpositioning the strongest reception path in each case at a specificpoint, for example at D:Td/3.

As has already been mentioned, the correlation values CI(m) and CQ(m) ofthe scanner channels can be interpreted as coordinates of a data vectord(m)=(CI(m), CQ(m)) in the complex plane (FIG. 4a). The angle Phibetween the data vector and the real axis then corresponds to the phaseshift between the carrier of the received signal and the localoscillator. If the frequencies of the received signal and of the localoscillator coincide (f_(IF) =fo), the angle Phi will remain constant onaverage and assume an average value and only fluctuate around thisaverage value due to the noise in the received signal.

For an optimum detection, by averaging over a plurality of receptionvectors, the unit vector e=(x1, y1) is calculated from the angle Phi asshown in FIG. 4a for which the following applies:

    y1/x1=tan(phi)

    x1.sup.2 +y1.sup.2 =1

Each received data vector d(m) is multiplied by the complex conjugate ofvector e:

    B(m)=Re(e:d(m)

From the real part of the product, the transmitted data bit isdetermined from the sign of B(m); the magnitude of the product is ameasure for the reliability of the decision and can be supplied asquality information to a following error decoder.

If the frequencies of received signal and local oscillator aredifferent, successive vectors d(m) and d(m+1) are rotated towards oneanother (FIG. 4b). This rotation Psi is proportional to the frequencydifference df and to the bit length Tb:

    Psi=2:Pi:df:Tb

In this case, in addition to the initial phase Phi, the frequency offsetmust also be estimated by means of the phase rotation Psi. From this, areference vector r can be calculated which now no longer possesses aconstant phase Phi, but rather rotates with the angular speed 2:Pi:df:

    r(m)=(x2, y2)

    y2/x2=tan(Phi+2:Pi:df:m:Tb)

The demodulation occurs in the same way as before:

    B(m)=Re(r(m):d(m))

The estimation of the frequency difference df can occur, for example, bymeans of a Fast Fourier transform (FFT) by means of 2^(M) successivedata vectors d(m).

(M=1 . . . 2^(M), to example m=1 . . . 32).

In a multipath receiver, each reception path n usually has a differentphase shift Phi in relation to the local oscillator because of thedifferent lengths of the propagation paths. The frequency difference dfis, however, almost identical in in-house channels for all paths, sinceDoppler effect can be neglected. Therefore, the estimation of thefrequency difference for all paths can occur jointly, whilst the phasefor each path must be calculated individually. A simple solution isoffered here by the differential demodulation of two successive datavectors d(m-1) and d(m). Here, the first vector d(m-1) is rotated by theamount Psi=2:Pi:df:Tb and then used as reference for the demodulation ofthe next data vector d(m):

    r(m)=d(m-1):e.sup.j.Psi

The demodulated bit value is:

    B(m)=Re(r(m)*:d(m))

The demodulated bit values B(m) of n channels are present in themultipath receiver. Said values have to be combined in an appropriatemanner in order to enable a decision relating to the received bit to bemade. For this purpose, for each reception channel the expected value ofthe signal amplitude Gn=[(d_(n) (m):d_(n) (m)*)^(1/2) ] is calculated asweighting. The bit values B(m) are multiplied by the square of Gn andthe products are summed over all values of n to form S(m). The sign ofS(m) yields the value of the detected bit and the magnitude of S(m) is ameasure of the strength of the received signal and therefore also of thereliability of this decision.

If the code synchronism is lost in operation, a resynchronization isperformed. In contrast to the acquisition, however, the complete codelength is not searched, but rather one of the search algorithms knownfrom the literature is used, for example that according to thepublication "Performance Analysis for the Expanding Search PNAcquisition Algorithm" by W. R. Braun, IEEE Trans. Comm., COM-30, 1982.

Thus, all the essential functions of the multipath receiver, inparticular the evaluation of the results of the correlation have beencarried out in the digital signal processor, which, in conjunction withthe progammability of the functions of the time-integrating correlator,gives the described multipath receiver a considerable flexibility. Inaddition, the use of the time-integrating correlator with the describedarchitecture permits a monolithically integrateable solution which iseasy to use, space-saving and economical in terms of power.

What is claimed is:
 1. A digital receiver for receiving, as a receivedsignal, direct-sequence spread-spectrum signals propagated over atransmission channel and generated by multiplication of aninformation-carrying signal by an auxiliary function, the digitalreceiver comprising:a digital, time-integrating multi-stage correlatorfor producing correlation output signals corresponding to correlationsof the received signal with a reference code; a digital signal processorfor processing the correlation output signals; means for recovering adigital signal from the received signal, the digital signal beingsupplied as a first input to each stage of the correlator; and a digitaldelay line having a length corresponding to a maximum expected length ofan impulse response of the transmission channel carrying thedirect-sequence spread-spectrum signals, an input which is fed with thereference code, and plural outputs corresponding to delayed referencecodes which are successively time delayed with respect to each other andwhich are respectively connected to corresponding ones of the correlatorstages as second inputs.
 2. The digital receiver of claim 1, wherein thereference code comprises an encoded sequence of code elements, thenumber of code elements defining a code length, and each correlatorstage includes:an accumulator for storage of value; multiplier means forproducing a product of the digital signal and the delay line outputwhich are inputted to the correlator stage; and summing means forforming a sum of the multiplier means product and a currently storedvalue from the accumulator, the summing means sum being subsequentlystored in the accumulator as the stored value; the multiplying means,summing means and accumulator being successively operated to accumulatein the accumulator a correlation output signal at the end of a codelength.
 3. The digital receiver of claim 2, further comprising selectormeans responsive to control signals from the digital signal processorfor selecting a variable number S of the total number N of correlatorstages for estimating the channel impulse response during a scanningmode of operation, the delayed reference codes inputted to therespective selected correlator stages being successively shifted withrespect to each other by a predetermined constant time delay.
 4. Thedigital receiver of claim 3, wherein the digital signal processorproduces control signals for controlling the selector means during thescanning mode of operation such that:an initial set of correlationoutput signals is produced, during a code period corresponding to theduration of a code element multiplied by the code length, by theselected correlator stages respectively using a first set of delayedreference codes; and successive sets of correlation output signals areproduced during successive code periods by the selected correlatorstages respectively using successive sets of delayed reference codeswhich are shifted from the preceding set of delayed reference codes byan amount equal to the product of the number of selected correlatorstages and the predetermined constant time delay, the successive sets ofcorrelation output signals being produced until the entire length of thereference code has been correlated sequentially with the digital signal.5. The digital receiver of claim 4, wherein the digital signal processorevaluates the correlation output signals produced by the selectedcorrelator stages during the scanning mode of operation to identify afirst delay line position producing a corresponding first highestabsolute value of the channel input response, and controls the selectormeans so that a first one of the correlator stages used during ademodulation mode of operation receives a delayed reference code fromthe first delay line position identified during the scanning mode ofoperation.
 6. The digital receiver of claim 5, wherein:the number ofcorrelator stages used for demodulation is equal to N-S, and the digitalsignal processor controls the selector means so that the partition ofthe correlator stages between those used for scanning and those used fordemodulation is performed dynamically in response to changingcharacteristics of the transmission channel.
 7. The digital receiver ofclaim 2, wherein each correlator stage further includes a result memorywhich selectively stores the correlation value signal present in theassociated accumulator of the correlation stage, and selectively outputsthe correlation value signal stored therein to the digital signalprocessor, in response to control signals from the digital signalprocessor.
 8. The digital receiver of claim 1, wherein the digital delayline comprises a plurality of stages which each produce a delay lineoutput, and the number of delay line stages corresponds to the length ofthe digital delay line, and the number N of correlator stagescorresponds to the number of delay line stages.
 9. The digital receiverof claim 1, wherein the digital delay line comprises a plurality ofstages which each produce a delay line output, and the number of delayline stages corresponds to the length of the digital delay line, and thenumber N of correlator stages is less than the number of delay linestages; and the relative time delay of each digital delay line outputwhich is applied to a correlator stage is variable so that the digitalsignal is processed only where discrete signal portions of the impulseresponse occur.
 10. The digital receiver of claim 9, further including aselection circuit responsive to the digital signal processor connectedbetween the digital delay line and each of the correlator stages forvarying the relative time delay of the digital delay line outputprovided to each correlator stage.
 11. The digital receiver of claim 7,wherein the digital signal is recovered from the received signal at asampling rate, and the digital delay line operates responsive to a clockto shift the reference code through the digital delay line at a ratecorresponding to the sampling rate.
 12. The digital receiver of claim11, further including:a filter for filtering the received signal toproduce a filtered received signal; a converter for mixing the filteredreceived signal to produce an intermediate frequency signal; and an I/Qprocessor comprising a local oscillator for mixing the intermediatefrequency signal with cosine and sine base band signals produced by thelocal oscillator to produce an in-phase base band signal and aquadrature base band signal.
 13. The digital receiver of claim 12,wherein the I/Q processor includes:a first analog-to-digital convertorto convert the in-phase base-band signal to an in-phase digital signal;and a second analog-to-digital converter to convert the quadraturebase-band signal to a quadrature digital signal.
 14. The digitalreceiver of claim 13, further comprising a control circuit responsive tocontrol signals from the digital signal processor for controlling thecorrelator during a coarse synchronization mode of operation such thatsuccessive sets of correlation output signals are sequentially produced,the delay line outputs used to produce a set of correlation outputsignal successively differing from each other by a constant delay, andeach delay line output being successively shifted after each set ofcorrelation output signals is produced by an amount corresponding to theproduct of the constant delay and the number of correlator stagesproducing the sets of correlation output signals.
 15. The digitalreceiver of claim 14, comprising:first and second digital,time-integrating multistage correlators, the first correlator beingconnected to the in-phase digital signal for producing in-phasecorrelation output signals and the second correlator being connected tothe quadrature digital signal for producing quadrature correlationoutput signals associated with the in-phase correlation output signals;a reference code generator for controllably generating the referencecode; means included in the digital signal processor for derivingrespective reception energy values from each set of in-phase andassociated quadrature correlation output signals to determine a maximumreception energy value; and means for controlling the reference codegenerator so that the reference code which is produced defines areception window for the first and second correlators which is centeredaround the determined energy maximum.
 16. The digital receiver of claim15, wherein the digital signal processor:derives a unit vector from aplurality of successive reception vectors respectively formed from thesuccessive sets of in-phase and associated quadrature phase correlationoutput signals, combines each reception vector with the complexconjugate of the unit vector; and determines a corresponding transmitteddata bit of the received signal in accordance with each result ofcombining a reception vector with the complex conjugate of the unitvector.
 17. The digital receiver of claim 16, wherein the digital signalprocessor:compensates the reception vectors, prior to deriving the unitvector, for phase rotation caused by frequency deviations between acarrier frequency of the received signal and the frequency of the localoscillator base band signals; and derives the unit vector by averagingthe successive reception vectors.